The present invention is generally related to methods for enhancing the reliability of microelectronic circuits, and in particular, to minimizing induced aging from both electrical stress and radiation on devices and circuits due to the atomic mismatch at the interface of semiconductor/dielectric materials.
A variety of physical phenomena contributes to the degradation of the fundamental electronic devices making up microelectronic circuits. One of the basic devices in any microelectronic circuit is a field effect transistor (FET). It will be used here to illustrate the degradation problem. The primary mechanism of degradation of FET characteristics, such as drift of the threshold voltage and reduction in the channel carrier transconductance, involves the semiconductor/dielectric interface.
FIG. 1 is schematic diagram of a field effect transistor. The essential elements of the basic device include the gate electrode, the dielectric, the underlying semiconductor layer, and spacers. The gate electrode is usually comprised of heavily doped polycrystalline silicon or, increasingly of a metal or metallic alloy. The dielectric is normally a nitrided SiO2 or an oxy-nitride, but is increasingly replaced by a higher permittivity dielectric such as HfxSi1-xO2 or HfxSi1-xOpNq. The underlying semiconductor layer is usually Si or a SiGe mixture in which the active layer enables formation of the inversion layer between the source and drain contacts required for transistor operation. The spacers are usually formed of SiO2 or Si3N4 and enable the formation of graded source/drain contacts required to engineer the electric fields present in the immediate vicinity of the contacts.
In the usual manner, application of the appropriate potential to the gate electrode results in the formation of an inversion layer in a channel between the source and drain contacts under the dielectric. The quality of the interface between the dielectric and the semiconductor will dictate both the threshold voltage at which the device can be “turned on” and the intensity of the current which flows in the inversion layer between the source and drain contacts.
Elsewhere in the circuit will be more dielectric layers and these may be in contact with the semiconductor surface also. These dielectric layers are typically used for inter-device isolation. Inasmuch as the interfacial region under these dielectrics can lead to parasitic device/device coupling or leakage current, they are also important in the process of circuit aging.
The primary mechanism of degradation of FET characteristics, such as drift of the threshold voltage and reduction in the channel carrier transconductance, involves the semiconductor/dielectric interface (FIG. 1). Because of the atomic network mismatch between the material of the semiconductor and the material of the dielectric, the presently manufactured devices contain large numbers of dangling bonds at this interface. These electrically active bonding defects contribute to the parameters defining the threshold voltage and carrier mobility in the inversion channel. In order to passivate these interfacial defects an annealing is typically carried out in an atmosphere containing a partial pressure of hydrogen or a hydrogen isotope. Symbolically this process can be represented as:≡X•+H2→X—H+H↑  (1)where ≡X• symbolizes the semiconductor with associated “dangling” bond and H↑ represents a hydrogen (or hydrogen isotope) species released by cracking of the basic H2 molecule. The hydrogen or hydrogen isotope may be present in the device either by deliberate addition in the form of so called forming gas or be present as a result of the processing steps used in basic device manufacture (OH groups due to humidity, SiH4 used in the deposition of SiO2 or amorphous Si, etc).
Aging of devices under electrical stressing or even as a result of irradiation occurs by a form of reverse process of Eq. 1 which results in the appearance of the electrically active defect, ≡X•:≡X—H+bond breaking effect→X•H→X•+H↑  (2)
The escaping hydrogenous species diffuses away either through the dielectric film or into the semiconductor. In the former case, two H↑ species will ultimately encounter and dimerize to form the hydrogenous molecule. Typical reactions resulting in bond breaking are hot electron stressing (D. J. DiMaria, “Defect generation in field-effect transistors under channel-hot-electron stress: J. Appl. Phys. 87 8707-8715 (2000) and J. H. Stathis, “Reliability limits for the gate insulator in CMOS technology,” IBM J. Res & Dev. 64 265-286 (2002)), Fowler-Nordheim electron injection from the gate electrode (D. J. DiMaria and J. H. Stathis, “Anode hole injection, defect generation and breakdown in ultra-thin silicon dioxide films,” J. Appl. Phys. 89 5015-5024 (2001)), and negative bias temperature instability (S. Zafar et al, “Negative bias temperature instability, charge trapping and high k dielectric stacks” 6th Annual Topical Conference on Reliability, Austin, Tx (2003)) These are the most common reactions in device aging.
In specific applications, for example in space, one must also take account of the possible interaction of radiation in breaking bonds (as in DiMaria 87). In this case, the radiation can either break the bond directly or via the generation of protons in the dielectric above the semiconductor active layer with subsequent diffusion (D. Brown and N. S. Saks, “Time dependence of radiation-induced interface trap formation in metal-oxide-semiconductor devices as a function of oxide thickness and applied field” J. Appl. Phys. 70 3734-3747 (1991)) to the interface followed by bond breaking and the formation of H2 as defined in Eq. 2.
Furthermore, elsewhere in microelectronics circuits, dielectrics other than the so called gate dielectric are used (for example, in inter-device isolation) and these may incorporate hydrogenous species (e.g. in Si—OH bonds). Radiation induced bond breakage can result in the formation of H or H+ species which can diffuse through the dielectric network and have a deleterious effect when they arrive at a semiconductor/dielectric interface.
As technology is being scaled to smaller and smaller dimensions, it is becoming increasingly evident that the electrically induced degradation effects are significantly more relevant. As an example, higher power consumption resulting in increased temperature of operation of the device is leading to revived importance of the negative bias temperature instability mechanism which was less important when operational temperatures were lower.
A means of reducing the degradation effects, whether resulting from electrical stressing or radiation is clearly essential for future technologies. Conventionally, aging resulting from electrical stressing was reduced by a) lower operation voltages (lower electric fields across the dielectric) for Fowler-Nordheim injection from the gate electrode; b) careful design of the drain electrode geometry to reduce hot carrier injection (reduction of hot carrier stressing); and c) operational temperature reduction (reduced negative bias temperature instability).
In conventional microelectronics technology, reduction of the effects of electrically active interfacial defects at the dielectric/semiconductor interface is performed by passivation using a hydrogenous species such as H or D. This level of device “hardening” to aging is already performed as standard. However, this hardening is proving inadequate and a new mechanism must be found to improve the reliability lifetime of devices.
The present invention describes a new method of hardening by reducing the probability that conventional de-passivation can occur or, if it occurs, increasing the probability that re-passivation of the de-passivated interface is likely.